MC9S12T64 Datasheet, PDF (141/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Multiplexed External Bus
Interface (MEBI)
Contents
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Modes of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
External Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Low-Power Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Overview
The MEBI sub-block of the Core serves to provide access and/or
visibility to internal Core data manipulation operations including timing
reference information at the external boundary of the Core and/or
system. Depending upon the system operating mode and the state of
bits within the control registers of the MEBI, the internal 16-bit read and
write data operations will be represented in 8-bit or 16-bit accesses
externally. Using control information from other blocks within the system,
the MEBI will determine the appropriate type of data access to be
generated.
NOTE:
The internal Flash EEPROM is located in whole 64K byte memory
space. Therefore the Flash EEPROM or parts of it must be disabled to
connect external memory devices with the external bus.
Modes of Operation
Refer to the Operating Modes section.
Multiplexed External Bus Interface (MEBI)
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MC9S12T64Revision 1.1.1