MC9S12T64 Datasheet, PDF (340/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Pulse Width Modulator (PWM8B8C)
PCLK2 — Pulse Width Channel 2 Clock Select
1 = Clock SB is the clock source for PWM channel 2.
0 = Clock B is the clock source for PWM channel 2.
PCLK1 — Pulse Width Channel 1 Clock Select
1 = Clock SA is the clock source for PWM channel 1.
0 = Clock A is the clock source for PWM channel 1.
PCLK0 — Pulse Width Channel 0 Clock Select
1 = Clock SA is the clock source for PWM channel 0.
0 = Clock A is the clock source for PWM channel 0.
PWM Prescale
Clock Select
Register
(PWMPRCLK)
Address Offset: $00A3
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
PCKB2
PCKB1
PCKB0
PCKA2
PCKA1
PCKA0
Write:
Reset:
0
0
0
0
0
0
0
0
= Reserved or unimplemented
This register selects the prescale clock source for clocks A and B
independently.
Read: anytime
Write: anytime
CAUTION:
PCKB2–0 and PCKA2–0 register bits can be written anytime. If the clock
pre-scale is changed while a PWM signal is being generated, a
truncated or stretched pulse can occur during the transition.
PCKB2–PCKB0 — Prescaler Select for Clock B
Clock B is one of two clock sources which can be used for channels
2, 3, 6, or 7. These three bits determine the rate of clock B, as shown
in the following table.
MC9S12T64Revision 1.1.1
Pulse Width Modulator (PWM8B8C)
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