MC9S12T64 Datasheet, PDF (278/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Clocks and Reset Generator (CRG)
RESET
XCLKS
EXTAL
MCU
XTAL
CMOS-COMPATIBLE
EXTERNAL OSCILLATOR
(VDDPLL-Level)
not connected
Figure 44 External Clock Connections (XCLKS=0)
RESET is an active low bidirectional reset pin. As an input it initializes
the MCU asynchronously to a known start-up state. As an open-drain
output it indicates that an system reset (internal to MCU) has been
triggered.
The XCLKS is an input signal which controls whether a crystal in
combination with the internal Colpitts (low power) oscillator is used or
whether Pierce oscillator/external clock circuitry is used. The XCLKS pin
is sampled during reset with the rising edge of RESET. Table 50 lists the
state coding of the sampled XCLKS signal.
Table 50 Clock Selection Based on XCLKS at reset
XCLKS
1
0
Description
Colpitts Oscillator selected
Pierce Oscillator / External clock selected
MC9S12T64Revision 1.1.1
Clocks and Reset Generator (CRG)
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