MC9S12T64 Datasheet, PDF (474/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI)
Transmission
Formats
During an SPI transmission, data is transmitted (shifted out serially) and
received (shifted in serially) simultaneously. The serial clock (SCK)
synchronizes shifting and sampling of the information on the two serial
data lines. A slave select line allows selection of an individual slave SPI
device; slave devices that are not selected do not interfere with SPI bus
activities. Optionally, on a master SPI device, the slave select line can
be used to indicate multiple-master bus contention.
MASTER SPI
SHIFT REGISTER
BAUD RATE
GENERATOR
MISO
MOSI
SCK
SS
SLAVE SPI
MISO
MOSI
SCK
SHIFT REGISTER
SS
V_DD
Figure 93 Master/Slave Transfer Block Diagram
MC9S12T64Revision 1.1.1
Serial Peripheral Interface (SPI)
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