MC9S12T64 Datasheet, PDF (224/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Flash EEPROM 64K
ensure the command sequence was valid. The CBEIF flag will be
set again indicating the address, data and command buffers are
ready for a new command sequence to begin.
The completion of the command is indicated by the CCIF flag setting
(Command Complete Interrupt Flag). The CCIF flag only sets when all
active and pending commands have been completed.
NOTE:
The Command State Machine will flag errors in program or erase write
sequences by means of the ACCERR (access error) and PVIOL
(protection violation) flags in the FSTAT register. An erroneous
command write sequence will abort and set the appropriate flag. If set,
the user must clear the ACCERR or PVIOL flags before commencing
another command write sequence. By writing a 0 to the CBEIF flag the
command sequence can be aborted after the word write to the Flash
address space or after writing a command to the FCMD register and
before the command is launched. Writing a “0” to the CBEIF flag in this
way will set the ACCERR flag.
A summary of the program algorithm is shown in Figure 28. For the
erase algorithm, the user writes either a mass or sector erase command
to the FCMD register.
MC9S12T64Revision 1.1.1
Flash EEPROM 64K
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