MC9S12T64 Datasheet, PDF (126/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Module Mapping Control (MMC)
Initialization of
Register Block
Position Register
(INITRG)
This register initializes the internal register block position. Mapping of
internal registers is controlled by five bits in the INITRG register. After
reset the 1K byte register block resides at location $0000 but can be
reassigned to any 2K byte boundary within the first 32K byte of the 64K
byte address space.
Read: Anytime.
Write: Write once in Normal and Emulation modes. Write anytime in
Special modes.
NOTE: Writes to this register take one cycle to go into effect.
Reset to $00 (Registers located from $0000 to $03FF)
Address Offset: $0011
Bit 7
6
5
4
3
2
Read: 0
0
REG14 REG13 REG12 REG11
Write:
Reset: 0
0
0
0
0
0
= Unimplemented
1
Bit 0
0
0
0
0
REG[14:11] — Internal register map position
These four bits in combination with the leading zero supplied by bit 7
of INITRG determine the upper five bits of the base address for the
system’s internal registers (i.e. the minimum base address is $0000
and the maximum is $7FFF).
MC9S12T64Revision 1.1.1
Module Mapping Control (MMC)
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