MC9S12T64 Datasheet, PDF (339/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Pulse Width Modulator (PWM8B8C)
Register Descriptions
PWM Clock Select
Register (PWMCLK)
Address Offset: $00A2
Bit 7
Read:
Write:
PCLK7
Reset:
0
6
PCLKL6
0
5
PCLK5
0
4
PCLK4
0
3
PCLK3
0
2
PCLK2
0
1
PCLK1
0
Bit 0
PCLK0
0
Each PWM channel has a choice of two clocks to use as the clock
source for that channel as described below.
Read: anytime
Write: anytime
CAUTION:
Register bits PCLK0 to PCLK7 can be written anytime. If a clock select
is changed while a PWM signal is being generated, a truncated or
stretched pulse can occur during the transition.
PCLK7 — Pulse Width Channel 7 Clock Select
1 = Clock SB is the clock source for PWM channel 7.
0 = Clock B is the clock source for PWM channel 7.
PCLK6 — Pulse Width Channel 6 Clock Select
1 = Clock SB is the clock source for PWM channel 6.
0 = Clock B is the clock source for PWM channel 6.
PCLK5 — Pulse Width Channel 5 Clock Select
1 = Clock SA is the clock source for PWM channel 5.
0 = Clock A is the clock source for PWM channel 5.
PCLK4 — Pulse Width Channel 4 Clock Select
1 = Clock SA is the clock source for PWM channel 4.
0 = Clock A is the clock source for PWM channel 4.
PCLK3 — Pulse Width Channel 3 Clock Select
1 = Clock SB is the clock source for PWM channel 3.
0 = Clock B is the clock source for PWM channel 3.
Pulse Width Modulator (PWM8B8C)
For More Information On This Product,
Go to: www.freescale.com
MC9S12T64Revision 1.1.1