MC9S12T64 Datasheet, PDF (549/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Breakpoint (BKP)
Modes of Operation
Modes of Operation
The Breakpoint can operate in Dual Address Mode or Full Breakpoint
Mode. Each of these modes is discussed in the subsections below.
Dual Address
Mode
When Dual Address Mode is enabled, two address breakpoints can be
set. Each breakpoint can cause the system to enter Background Debug
Mode or to initiate a software interrupt based upon the state of the
BKBDM bit in the BKPCT0 Register being logic one or logic zero,
respectively. BDM requests have a higher priority than the SWI
requests. No data breakpoints are allowed in this mode.
The BKTAG bit in the BKPCT0 register selects whether the breakpoint
mode is force or tag. The BKxMBH:L bits in the BKPCT1 register select
whether or not the breakpoint is matched exactly or is a range
breakpoint. They also select whether the address is matched on the high
byte, low byte, both bytes, and/or memory expansion. The BKxRW and
BKxRWE bits in the BKPCT1 register select whether the type of bus
cycle to match is a read, write, or both when performing forced
breakpoints.
Full Breakpoint
Mode
Full Breakpoint Mode requires a match on address and data for a
breakpoint to occur. Upon a successful match, the system will enter
Background Debug Mode or initiate a software interrupt based upon the
state of the BKBDM bit in the BKPCT0 Register being logic one or logic
zero, respectively. The BDM requests have a higher priority than the
SWI requests. R/W matches are also allowed in this mode.
The BKTAG bit in the BKPCT0 register selects whether the breakpoint
mode is forced or tagged. If the BKTAG bit is set in BKPCT0, then only
address is matched, data is ignored. The BK0MBH:L bits in the BKPCT1
register select whether or not the breakpoint is matched exactly, is a
range breakpoint, or is in page space. The BK1MBH:L bits in the
BKPCT1 register select whether the data is matched on the high byte,
low byte, or both bytes. The BK0RW and BK0RWE bits in the BKPCT1
register select whether the type of bus cycle to match is a read or a write
Breakpoint (BKP)
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MC9S12T64Revision 1.1.1