HD6432633 Datasheet, PDF (986/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

22.8.2 Software Protection
Software protection can be implemented by setting the SWE1 bit in FLMCR1, erase block register
1 (EBR1), erase block register 2 (EBR2), and the RAMS bit in the RAM emulation register
(RAMER). When software protection is in effect, setting the P1 or E1 bit in flash memory control
register 1 (FLMCR1), does not cause a transition to program mode or erase mode. (See table
22-12.)
Table 22-12 Software Protection
Functions
Item
Description
Program Erase
SWE bit protection • Setting bit SWE1 in FLMCR1 to 0 will
Yes
Yes
place area H'000000 to H'03FFFF in the
program/erase-protected state (Execute
the program in the on-chip RAM, external
memory).
Block specification • Erase protection can be set for individual —
Yes
protection
blocks by settings in erase block register 1
(EBR1) and erase block register 2 (EBR2).
• Setting EBR1 and EBR2 to H'00 places all
blocks in the erase-protected state.
Emulation protection • Setting the RAMS bit to 1 in the RAM
Yes
Yes
emulation register (RAMER) places all
blocks in the program/erase-protected
state.
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