HD6432633 Datasheet, PDF (1150/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

27.3.3 Bus Timing
Table 27-6 lists the bus timing.
Table 27-6 Bus Timing
Condition:
PV_CC = 4.5 V to 5.5 V, AV_CC = 4.5 V to 5.5 V, V_ref = 4.5 V to AV_CC,
V_SS = AV_SS = PLLV_SS = 0 V, ø = 2 to 28 MHz, T_a = –20°C to +75°C (regular
specifications), T_a = –40°C to +85°C (wide-range specifications)
Item
Address delay time
Address setup time
Address hold time
CS delay time 1
CS delay time 2
AS delay time
RD delay time 1
RD delay time 2
Read data setup time
Read data hold time
Read data access time 1
Read data access time 2
Read data access time 3
Read data access time 4
Read data access time 5
WR delay time 1
WR delay time 2
WR pulse width 1
WR pulse width 2
Write data delay time
Write data setup time
Write data hold time
WR setup time
WR hold time
Symbol
t _AD
t _AS
t _AH
t _CSD1
t _CSD2
t _ASD
t _RSD1
t _RSD2
t _RDS
t _RDH
t _ACC1
t _ACC2
t _ACC3
t _ACC4
t _ACC5
t _WRD1
t _WRD2
t _WSW1
t _WSW2
t _WDD
t _WDS
t _WDH
t _WCS
t _WCH
Min
—
0.5 × t_cyc – 13
0.5 × t_cyc – 8
—
—
—
—
—
15
0
—
—
—
—
—
—
—
1.0 × t_cyc – 13
1.5 × t_cyc – 13
—
0.5 × t_cyc – 13
0.5 × t_cyc – 8
0.5 × t_cyc – 10
0.5 × t_cyc – 10
Max
20
—
—
15
15
15
15
15
—
—
1.0 × t_cyc – 15
1.5 × t_cyc – 15
2.0 × t_cyc – 15
2.5 × t_cyc – 15
3.0 × t_cyc – 15
15
15
—
—
22
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions
Figure 27-6 to
figure 27-10
1096