HD6432633 Datasheet, PDF (597/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

11.2.5 Timer Status Register (TSR)
Channel 0: TSR0
Channel 3: TSR3
Bit
:
7
6
5
4
3
2
1
0
—
—
—
TCFV TGFD TGFC TGFB TGFA
Initial value :
1
1
0
0
0
0
0
0
R/W
:—
—
—
R/(W)* R/(W)* R/(W)* R/(W)* R/(W)*
Note: * Only 0 can be written, for flag clearing.
Channel 1: TSR1
Channel 2: TSR2
Channel 4: TSR4
Channel 5: TSR5
Bit
:
Initial value :
R/W
:
7
TCFD
1
R
6
5
4
3
—
TCFU TCFV
—
1
0
0
0
— R/(W)* R/(W)* —
Note: * Only 0 can be written, for flag clearing.
2
1
0
—
TGFB TGFA
0
0
0
— R/(W)* R/(W)*
The TSR registers are 8-bit registers that indicate the status of each channel. The TPU has six TSR
registers, one for each channel. The TSR registers are initialized to H'C0 by a reset, and in
hardware standby mode.
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