HD6432633 Datasheet, PDF (967/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

22.5.5 RAM Emulation Register (RAMER)
Bit: 7
—
Initial value: 0
R/W: R
6
5
4
3
2
1
0
—
—
— RAMS RAM2 RAM1 RAM0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W
RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating
real-time flash memory programming. RAMER initialized to H'00 by a power-on reset and in
hardware standby mode. It is not initialized by a manual reset and in software standby mode.
RAMER settings should be made in user mode or user program mode.
Flash memory area divisions are shown in table 22-8. To ensure correct operation of the emulation
function, the ROM for which RAM emulation is performed should not be accessed immediately
after this register has been modified. Normal execution of an access immediately after register
modification is not guaranteed.
Bits 7 and 6—Reserved: These bits always read 0.
Bits 5 and 4—Reserved: Only 0 may be written to these bits.
Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory block are program/erase-protected.
Bit 3
RAMS
0
1
Description
Emulation not selected
Program/erase-protection of all flash memory blocks is disabled
Emulation selected
Program/erase-protection of all flash memory blocks is enabled
(Initial value)
913