HD6432633 Datasheet, PDF (974/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

On-Chip RAM Area Divisions in Boot Mode: In boot mode, the RAM area is divided into an
area used by the boot program and an area to which the programming control program is
transferred via the SCI, as shown in figure 22-9. The boot program area cannot be used until the
execution state in boot mode switches to the programming control program transferred from the
host.
H'FFC000
Programming
control program area
(8 kbytes)
Boot program area
(4 kbytes)
H'FFDFFF
H'FFE000
H'FFEFBF
Note: The boot program area cannot be used until a transition is made to the execution state for
the programming control program transferred to RAM. Note also that the boot program
remains in this area of the on-chip RAM even after control branches to the programming
control program.
Figure 22-9 RAM Areas in Boot Mode
Notes on Use of Boot Mode:
• When the chip comes out of reset in boot mode, it measures the low-level period of the input at
the SCI’s RxD2 pin. The reset should end with RxD2 high. After the reset ends, it takes
approximately 100 states before the chip is ready to measure the low-level period of the RxD2
pin.
• In boot mode, if any data has been programmed into the flash memory (if all data is not 1), all
flash memory blocks are erased. Boot mode is for use when user program mode is unavailable,
such as the first time on-board programming is performed, or if the program activated in user
program mode is accidentally erased.
• Interrupts cannot be used while the flash memory is being programmed or erased.
• The RxD2 and TxD2 pins should be pulled up on the board.
• Before branching to the programming control program (RAM area H'FFC000), the chip
terminates transmit and receive operations by the on-chip SCI (channel 2) (by clearing the RE
and TE bits in SCR to 0), but the adjusted bit rate value remains set in BRR. The transmit data
output pin, TxD2, goes to the high-level output state (PA1DDR = 1, PA1DR = 1).
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