HD6432633 Datasheet, PDF (1048/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

Bit 6—Low-Speed ON Flag (LSON): When shifting to low power dissipation mode by executing
the SLEEP instruction, this bit specifies the operating mode, in combination with other control
bits. This bit also controls whether to shift to high-speed mode or sub-active mode* when watch
mode* is cancelled.
Note: * This function is not available in the H8S/2695.
Bit 6
LSON Description
0
• When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, software standby mode, or watch mode*¹ *².
• When the SLEEP instruction is executed in sub-active mode*², operation shifts to
watch mode*² or shifts directly*² to high-speed mode.
• Operation shifts to high-speed mode when watch mode is cancelled. (Initial value)
1
• When the SLEEP instruction is executed in high-speed mode, operation shifts to
watch mode*² or sub-active mode*².
• When the SLEEP instruction is executed in sub-active mode*², operation shifts to
sub-sleep mode*² or watch mode*².
• Operation shifts to sub-active*² mode when watch mode^*2 is cancelled.
Notes: *1 Always set high-speed mode when shifting to watch mode or sub-active mode.
*2 This function is not available in the H8S/2695.
Bit 5—Noise Elimination Sampling Frequency Select (NESEL): This bit selects the sampling
frequency of the subclock (øSUB) generated by the subclock oscillator is sampled by the clock (ø)
generated by the system clock oscillator. Set this bit to 0 when ø=5MHz or more.
Bit 5
NESEL Description
0
Sampling using 1/32 xø
1
Sampling using 1/4 xø
(Initial value)
Bit 4—Subclock enable (SUBSTP): This bit enables/disables subclock generation.
Bit 4
SUBSTP Description
0
Enables subclock generation
1
Disables subclock generation
(Initial value)
994