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HD6432633 Datasheet, PDF (1297/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)
TIOR3H—Timer I/O Control Register 3H
H'FE82
Bit
:
Initial value :
R/W
:
7
IOB3
0
R/W
6
IOB2
0
R/W
5
IOB1
0
R/W
4
IOB0
0
R/W
3
IOA3
0
R/W
2
IOA2
0
R/W
1
IOA1
0
R/W
TPU3
0
IOA0
0
R/W
TGR3A I/O Control
0 0 0 0 TGR3A is Output disabled
1 output
Initial output is 0
1
compare
0 register
output
1
0 output at compare match
1 output at compare match
Toggle output at compare match
100
Output disabled
1
10
Initial output is 1 0 output at compare match
output
1 output at compare match
1
Toggle output at compare match
1 0 0 0 TGR3A is Capture input
Input capture at rising edge
1 input
capture
1 * register
source is
TIOCA3 pin
Input capture at falling edge
Input capture at both edges
1* *
Capture input Input capture at TCNT4 count-up/
source is channel count-down
4/count clock
*: Don't care
TGR3B I/O Control
0 0 0 0 TGR3B is Output disabled
1 output
Initial output is 0 0 output at compare match
1
compare
0 register
output
1 output at compare match
1
Toggle output at compare match
100
Output disabled
1
10
Initial output is 1 0 output at compare match
output
1 output at compare match
1
Toggle output at compare match
1 0 0 0 TGR3B is Capture input Input capture at rising edge
1 input
capture
1 * register
source is
TIOCB3 pin
Input capture at falling edge
Input capture at both edges
1* *
Capture input Input capture at TCNT4 count-up/
source is channel count-down*1
4/count clock
*: Don't care
Note: *1 When bits TPSC2 to TPSC0 in TCR4 are set to B'000 and ø/1 is used as the
TCNT4 count clock, this setting is invalid and input capture is not generated.
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