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HD6432633 Datasheet, PDF (1080/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)
Item
Condition A
Symbol Min
Max
Condition B
Test
Min Max Unit Conditions
Read data access tACC5
—
time 5
3.0 ×
—
tcyc – 35
3.0 × ns
tcyc – 25
WR delay time 1
t WRD1
—
30
—
18
ns
WR delay time 2
t WRD2
—
30
—
18
ns
WR pulse width 1
t WSW1
1.0 ×
—
tcyc – 30
1.0 × —
ns
tcyc – 15
WR pulse width 2
t WSW2
1.5 ×
—
tcyc – 30
1.5 × —
ns
tcyc – 15
Write data delay time tWDD
—
30
—
22
ns
Write data setup time tWDS
0.5 ×
—
tcyc – 27
0.5 × —
ns
tcyc – 15
Write data hold time tWDH
0.5 ×
—
tcyc – 20
0.5 × —
ns
tcyc – 8
WR setup time
t WCS
0.5 ×
—
tcyc – 15
0.5 × —
ns
tcyc – 10
WR hold time
t WCH
0.5 ×
—
tcyc – 15
0.5 × —
ns
tcyc – 10
RAS precharge time tPCH
1.5 ×
—
tcyc – 30
1.5 × —
ns
tcyc – 15
CAS precharge time1 tCP1
1.0 ×
—
tcyc – 20
1.0 × —
ns
tcyc – 8
CAS precharge time2 tCP2
0.5 ×
—
tcyc – 20
0.5 × —
ns
tcyc – 8
CAS delay time1
t CASD1
—
30
—
20
ns
CAS delay time2
t CASD2
—
30
—
18
ns
OE delay time1
t OED1
—
30
—
18
ns
OE delay time2
t OED2
—
30
—
18
ns
CAS setup time
t CSR
0.5 ×
—
tcyc – 25
0.5 × —
ns
tcyc – 8
WAIT setup time
t WTS
40
—
25
—
ns
WAIT hold time
t WTH
10
—
5
—
ns
BREQ setup time
t BRQS
60
—
30
—
ns
BACK delay time
t BACD
—
30
—
15
ns
Bus-floating time
t BZD
—
60
—
40
ns
BREQO delay time tBRQOD
—
40
—
25
ns
Notes: *1 AVCC = 3.3 V to 5.5 V if A/D and D/A not used (pins used as I/O ports).
*2 Vref = 3.3 V to AVCC if A/D and D/A not used (pins used as I/O ports).
Figure 25-6 to
figure 25-11
Figure 25-11 to
figure 25-13
Figure 25-8
Figure 25-14
Figure 25-15
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