HD6432633 Datasheet, PDF (1330/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

DMAWER—DMA Write Enable Register
H'FF60
(This function is not available in the H8S/2695.)
Bit
:7
DMAWER : —
Initial value : 0
R/W
:—
6
5
—
—
0
0
—
—
4
3
2
— WE1B WE1A
0
0
0
—
R/W R/W
1
WE0B
0
R/W
DMAC
0
WE0A
0
R/W
Write enable 1B
0
Disables writing to all DMACR1B bits, DMABCR bits 11, 7, and 3, and
DMATCR bit 5.
(initial value)
1
Enables writing to all DMACR1B bits, DMABCR bits 11, 7, and 3, and
DMATCR bit 5.
Write enable 1A
0
Disables writing to all DMACR1A bits, and DMABCR bits 10, 6, and 2.
(initial value)
1
Enables writing to all DMACR1A bits, and DMABCR bits 10, 6, and 2.
Write enable 0B
0
Disables writing to all DMACR0B bits, DMABCR bits 9, 5, and 1, and
DMATCR bit 4
(initial value)
1
Enables writing to all DMACR0B bits, DMABCR bits 9, 5, and 1, and
DMATCR bit 4.
Write enable 0A
0
Disables writing to all DMACR0A bits, and DMABCR bits 8, 4, and 0.
(initial value)
1
Enables writing to all DMACR0A bits, and DMABCR bits 8, 4, and 0.
DMATCR—DMA Terminal Control Register
H'FF61
(This function is not available in the H8S/2695.)
Bit
:
7
6
5
4
3
2
1
DMATCR : —
—
TEE1 TEE0
—
—
—
Initial value :
0
0
0
0
0
0
0
R/W
:—
—
R/W R/W
—
—
—
1276
Transfer end pin enable 0
0
Disables TEND0 pin output.
1
Enables TEND0 pin output.
Transfer end pin enable 1
0
Disables TEND1 pin output.
1
Enables TEND1 pin output.
DMAC
0
—
0
—