HD6432633 Datasheet, PDF (696/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

ø
External clock
input
Clock input
to TCNT
TCNT
N–1
N
N+1
Figure 13-3 Count Timing for External Clock Input
13.3.2 Compare Match Timing
Setting of Compare Match Flags A and B (CMFA, CMFB): The CMFA and CMFB flags in
TCSR are set to 1 by a compare match signal generated when the TCOR and TCNT values match.
The compare match signal is generated at the last state in which the match is true, just before the
timer counter is updated.
Therefore, when TCOR and TCNT match, the compare match signal is not generated until the
next incrementation clock input. Figure 13-4 shows this timing.
ø
TCNT
N
N+1
TCOR
N
Compare match
signal
CMF
Figure 13-4 Timing of CMF Setting
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