HD6432633 Datasheet, PDF (572/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

11.1.4 Register Configuration
Table 11-3 summarizes the TPU registers.
Table 11-3 TPU Registers
Channel Name
Abbreviation R/W Initial Value Address *¹
0
Timer control register 0
TCR0
R/W H'00
H'FF10
Timer mode register 0
TMDR0
R/W H'C0
H'FF11
Timer I/O control register 0H TIOR0H
R/W H'00
H'FF12
Timer I/O control register 0L TIOR0L
R/W H'00
H'FF13
Timer interrupt enable register 0 TIER0
R/W H'40
H'FF14
Timer status register 0
TSR0
R/(W)*² H'C0
H'FF15
Timer counter 0
TCNT0
R/W H'0000
H'FF16
Timer general register 0A
TGR0A
R/W H'FFFF
H'FF18
Timer general register 0B
TGR0B
R/W H'FFFF
H'FF1A
Timer general register 0C
TGR0C
R/W H'FFFF
H'FF1C
Timer general register 0D
TGR0D
R/W H'FFFF
H'FF1E
1
Timer control register 1
TCR1
R/W H'00
H'FF20
Timer mode register 1
TMDR1
R/W H'C0
H'FF21
Timer I/O control register 1
TIOR1
R/W H'00
H'FF22
Timer interrupt enable register 1 TIER1
R/W H'40
H'FF24
Timer status register 1
TSR1
R/(W) *² H'C0
H'FF25
Timer counter 1
TCNT1
R/W H'0000
H'FF26
Timer general register 1A
TGR1A
R/W H'FFFF
H'FF28
Timer general register 1B
TGR1B
R/W H'FFFF
H'FF2A
2
Timer control register 2
TCR2
R/W H'00
H'FF30
Timer mode register 2
TMDR2
R/W H'C0
H'FF31
Timer I/O control register 2
TIOR2
R/W H'00
H'FF32
Timer interrupt enable register 2 TIER2
R/W H'40
H'FF34
Timer status register 2
TSR2
R/(W) *² H'C0
H'FF35
Timer counter 2
TCNT2
R/W H'0000
H'FF36
Timer general register 2A
TGR2A
R/W H'FFFF
H'FF38
Timer general register 2B
TGR2B
R/W H'FFFF
H'FF3A
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