HD6432633 Datasheet, PDF (17/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

Section
16.2.8 Bit Rate
Register (BRR)
Page
713
714
716
717
718
16.2.10 IrDA Control 720
Register (IrCR)
16.3.2 Operation in 730
Asynchronous Mode
16.3.3 Multiprocessor 739
Communication
Function
16.3.4 Operation in 747
Clocked Synchronous
Mode
750
752
16.4 SCI Interrupts 756
757
16.5 Usage Notes 761
762
Item
Description
Table 16-3 BRR Settings
for Various Bit Rates
(Asynchronous Mode)
28 MHz bit rate added
Table 16-4 BRR Settings for
Various Bit Rates (Clocked
Synchronous Mode)
Table 16-5 Maximum Bit
Rate for Each Frequency
(Asynchronous Mode)
Table 16-6 Maximum Bit
Rate with External Clock Input
(Asynchronous Mode)
Table 16-7 Maximum Bit
Rate with External Clock Input
(Clocked Synchronous Mode)
Note added
Figure 16-5 Sample Serial
Transmission Flowchart
Figure 16-10 Sample
Multiprocessor Serial
Transmission Flowchart
Figure 16-16 Sample Serial
Transmission Flowchart
Figure 16-18 Sample Serial
Reception Flowchart
Figure 16-20 Sample
Flowchart of Simultaneous
Serial Transmit and Receive
Operations
Note * added
Table 16-13 SCI Interrupt
Sources
Restrictions on Use of DMAC
or DTC
Figure 16-25 Sample
Flowchart for Mode Transition
during Transmission
Note *1 added
Note * added
9