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HD6432633 Datasheet, PDF (317/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units) | |||
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Bits 10 to 7âReserved: Can be read or written to.
Bit 6âDestination Address Increment/Decrement (DAID)
Bit 5âDestination Address Increment/Decrement Enable (DAIDE): These bits specify
whether destination address register MARB is to be incremented, decremented, or left unchanged,
when data transfer is performed.
Bit 6
DAID
0
1
Bit 5
DAIDE
0
1
0
1
Description
MARB is fixed
(Initial value)
MARB is incremented after a data transfer
⢠When DTSZ = 0, MARB is incremented by 1 after a transfer
⢠When DTSZ = 1, MARB is incremented by 2 after a transfer
MARB is fixed
MARB is decremented after a data transfer
⢠When DTSZ = 0, MARB is decremented by 1 after a transfer
⢠When DTSZ = 1, MARB is decremented by 2 after a transfer
Bit 4âReserved: Can be read or written to.
Bits 3 to 0âData Transfer Factor (DTF3 to DTF0): These bits select the data transfer factor
(activation source). The factors that can be specified differ between normal mode and block
transfer mode.
⢠Normal Mode
Bit 3
DTF3
0
1
Bit 2
DTF2
0
1
*
Bit 1
DTF1
0
1
0
1
*
Bit 0
DTF0
0
1
0
1
*
0
1
*
Description
â
â
Activated by DREQ pin falling edge input
Activated by DREQ pin low-level input
â
Auto-request (cycle steal)
Auto-request (burst)
â
(Initial value)
*: Don't care
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