HD6432633 Datasheet, PDF (716/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

Bit 0—Clock Select (CKS): Selects the PWM D/A resolution. If the system clock (ø) frequency
is 10 MHz, resolutions of 100 ns and 200 ns can be selected.
Bit 0
CKS
0
1
Description
Operates at resolution (T) = system clock cycle time (t_cyc)
Operates at resolution (T) = system clock cycle time (t_cyc) × 2
(Initial value)
14.2.4 Module Stop Control Register B (MSTPCRB)
Bit
:7
6
5
4
3
2
1
0
MSTPB7 MSTPB6 MSTPB5 MSTPB4 MSTPB3 MSTPB2 MSTPB1 MSTPB0
Initial value : 1
1
1
1
1
1
1
1
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MSTPCRB is an 8-bit readable/writable register, and is used to perform module stop mode
control.
When the MSTPB2 is set to 1, at the end of the bus cycle 14-bit PWM timer 0 operation is halted
and a transition made to module stop mode. When the MSTPB1 is set to 1, at the end of the bus
cycle PWM timer 1 operation is halted and a transition made to module stop mode. See section
24.5, Module Stop Mode, for details.
MSTPCRB is initialized to H'FF by a power-on reset and in hardware standby mode. It is not
initialized in manual reset or software standby mode.
Bit 2—Module Stop (MSTPB2): Specifies PWM0 module stop mode.
Bit 2
MSTPB2
0
1
Description
PWM0 module stop mode is cleared
PWM0 module stop mode is set
(Initial value)
Bit 1—Module Stop (MSTPB1): Specifies PWM1 module stop mode.
Bit 1
MSTPB1
0
1
Description
PWM1 module stop mode is cleared
PWM1 module stop mode is set
(Initial value)
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