HD6432633 Datasheet, PDF (250/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

7.4.4 Basic Timing
8-Bit 2-State Access Space: Figure 7-6 shows the bus timing for an 8-bit 2-state access space.
When an 8-bit access space is accessed, the upper half (D15 to D8) of the data bus is used.
The LWR pin is fixed high. Wait states cannot be inserted.
Bus cycle
T₁
T₂
ø
Address bus
CSn
AS
RD
Read
D15 to D8
Valid
D7 to D0
Invalid
HWR
Write
LWR
D15 to D8
D7 to D0
Note: n = 0 to 7
High
Valid
High impedance
Figure 7-6 Bus Timing for 8-Bit 2-State Access Space
196