HD6432633 Datasheet, PDF (169/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

Vector
fetch
Prefetch of
Internal first program
processing instruction
ø
RES, MRES
Internal
address bus
(1)
(3)
(5)
Internal read
signal
Internal write
signal
High
Internal data
bus
(2)
(4)
(6)
(1) (3) Reset exception handling vector address (when power-on reset, (1) = H'000000,
(3) = H'000002)
(2) (4) Start address (contents of reset exception handling vector address)
(5) Start address ((5) = (2) (4))
(6) First program instruction
Figure 4-3 Reset Sequence (Modes 6 and 7)
4.2.4 Interrupts after Reset
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
4.2.5 State of On-Chip Supporting Modules after Reset Release
After reset release, MSTPCRA to MSTPCRC are initialized to H'3F, H'FF, and H'FF, respectively,
and all modules except the DMAC* and DTC*, enter module stop mode. Consequently, on-chip
supporting module registers cannot be read or written to. Register reading and writing is enabled
when module stop mode is exited.
Note: * DMAC and DTC functions are not available in the H8S/2695.
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