HD6432633 Datasheet, PDF (1331/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

DMACR0A—DMA Control Register 0A
H'FF62
DMACR0B—DMA Control Register 0B
H'FF63
DMACR1A—DMA Control Register 1A
H'FF64
DMACR1B—DMA Control Register 1B
H'FF65
(These functions are not available in the H8S/2695.)
Full address mode
DMAC
DMAC
DMAC
DMAC
Bit
: 15
14
13
12
11
10
9
8
DMACRA : DTSZ SAID SAIDE BLKDIR BLKE
—
—
—
Initial value :
0
0
0
0
0
0
0
0
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Block Direction/Block Enable
0 0 Transfer in normal mode
1 Transfer in block transfer mode,
destination is block area
1 0 Transfer in normal mode
1 Transfer in block transfer mode,
source is block area
Source Address Increment/Decrement
0 0 MARA is fixed
1 MARA is incremented after a data transfer
• When DTSZ = 0, MARA is incremented by 1 after a transfer
• When DTSZ = 1, MARA is incremented by 2 after a transfer
1 0 MARA is fixed
1 MARA is decremented after a data transfer
• When DTSZ = 0, MARA is decremented by 1 after a transfer
• When DTSZ = 1, MARA is decremented by 2 after a transfer
Data Transfer Size
0 Byte-size transfer
1 Word-size transfer
1277