HD6432633 Datasheet, PDF (87/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

Type
Interrupts
Address bus
Data bus
Bus control
Symbol
NMI
I/O
Input
IRQ7 to IRQ0 Input
A23 to A0
D15 to D0
Output
I/O
CS7 to CS0 Output
AS
Output
RD
Output
HWR
Output
LWR
Output
CAS
LCAS
OE
WAIT
Output
Output
Output
Input
Name and Function
Nonmaskable interrupt: Requests a nonmaskable
interrupt. When this pin is not used, it should be fixed
high.
Interrupt request 7 to 0: These pins request a
maskable interrupt.
Address bus: These pins output an address.
Data bus: These pins constitute a bidirectional data
bus.
Chip select: Selection signal for areas 0 to 7.
Address strobe: When this pin is low, it indicates that
address output on the address bus is enabled.
Read: When this pin is low, it indicates that the
external address space can be read.
High write/write enable/upper write enable:
A strobe signal that writes to external space and
indicates that the upper half (D15 to D8) of the data
bus is enabled.
The 2CAS type DRAM write enable signal.
The 2WE type DRAM upper write enable signal.
Low write/lower column address strobe/lower write
enable:
A strobe signal that writes to external space and
indicates that the lower half (D7 to D0) of the data bus
is enabled.
The 2CAS type (LCASS = 1) DRAM lower column
address strobe signal.
The 2WE type DRAM lower write enable signal.
Upper column address strobe/column address strobe:
The 2CAS type DRAM upper column address strobe
signal.
Lower column address strobe:
The 2CAS type DRAM lower column address strobe
signal.
Output enable:
Output enable signal for DRAM space read access.
Wait: Requests insertion of a wait state in the bus
cycle when accessing external 3-state address space.
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