HD6432633 Datasheet, PDF (1217/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

Branch
Byte Word
Instruction Address Stack
Data Data Internal
Fetch
Read Operation Access Access Operation
Instruction Mnemonic
I
J
K
L
M
N
XOR
XOR.B #xx:8,Rd
1
XOR.B Rs,Rd
1
XOR.W #xx:16,Rd
2
XOR.W Rs,Rd
1
XOR.L #xx:32,ERd
3
XOR.L ERs,ERd
2
XORC
XORC #xx:8,CCR
1
XORC #xx:8,EXR
2
Notes: *1 2 when EXR is invalid, 3 when EXR is valid.
*2 When n bytes of data are transferred.
*3 An internal operation may require between 0 and 3 additional states, depending on the
preceding instruction.
*4 When using the TAS instruction, use register ER0, ER1, ER4, or ER5.
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