HD6432633 Datasheet, PDF (272/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

• RAS up mode
To select RAS up mode, clear the RCDM bit of the MCR to 0. If DRAM access is interrupted
to access another area, the RAS signal level returns to High. Burst operation is only possible
when the DRAM space is contiguous. Figure 7-24 shows example timing in RAS up mode.
Note that the RAS signal level does not return to High in burst ROM space access.
DRAM
write access
DRAM
read access
External space
write access
T_p
T_r
T_c1
T_c2
T_c1
T_c2
T₁
T₂
ø
A23 to A0
RD
HWR (WE)
CSn (RAS)
CAS, LCAS
D15 to D0
Note: n= 2 to 5
Figure 7-24 Example Operation Timing in RAS Up Mode
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