HD6432633 Datasheet, PDF (868/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

MST and TRS select the operating mode as follows.
Bit 5
MST
0
1
Bit 4
TRS
0
1
0
1
Operating Mode
Slave receive mode
Slave transmit mode
Master receive mode
Master transmit mode
(Initial value)
Bit 5
MST
0
1
Description
Slave mode
(Initial value)
[Clearing conditions]
1. When 0 is written by software
2. When bus arbitration is lost after transmission is started in I²C bus
format master mode
Master mode
[Setting conditions]
1. When 1 is written by software (in cases other than clearing condition 2)
2. When 1 is written in MST after reading MST = 0 (in case of clearing condition 2)
Bit 4
TRS
0
1
Description
Receive mode
(Initial value)
[Clearing conditions]
1. When 0 is written by software (in cases other than setting condition
3)
2. When 0 is written in TRS after reading TRS = 1 (in case of clearing
condition 3)
3. When bus arbitration is lost after transmission is started in I²C bus
format master mode
4. When the SW bit in DDCSWR changes from 1 to 0
Transmit mode
[Setting conditions]
1. When 1 is written by software (in cases other than clearing conditions 3 and 4)
2. When 1 is written in TRS after reading TRS = 0 (in case of clearing conditions 3
and 4)
3. When 1 is received as the R/W bit of the first frame in I²C bus format slave mode
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