HD6432633 Datasheet, PDF (1060/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

24.8 Watch Mode (This function is not available in the H8S/2695)
24.8.1 Watch Mode
CPU operation makes a transition to watch mode when the SLEEP instruction is executed in high-
speed mode or sub-active mode with SBYCR SSBY=1, LPWRCR DTON = 0, and TCSR
(WDT1) PSS = 1.
In watch mode, the CPU is stopped and supporting modules other than WDT1 are also stopped.
The contents of the CPU’s internal registers, the data in internal RAM, and the statuses of the
internal supporting modules (excluding the SCI, ADC, and 14-bit PWM) and I/O ports are
retained.
24.8.2 Exiting Watch Mode
Watch mode is exited by any interrupt (WOVI1 interrupt, NMI pin, or IRQ0 to IRQ7), or signals
at the RES, MRES, or STBY pins.
(1) Exiting Watch Mode by Interrupts
When an interrupt occurs, watch mode is exited and a transition is made to high-speed mode or
medium-speed mode when the LPWRCR LSON bit = 0 or to sub-active mode when the LSON bit
= 1. When a transition is made to high-speed mode, a stable clock is supplied to all LSI circuits
and interrupt exception processing starts after the time set in SBYCR STS2 to STS0 has elapsed.
In the case of IRQ0 to IRQ7 interrupts, no transition is made from watch mode if the
corresponding enable bit has been cleared to 0, and, in the case of interrupts from the internal
supporting modules, the interrupt enable register has been set to disable the reception of that
interrupt, or is masked by the CPU.
See section 24.6.3, Setting Oscillation Stabilization Time after Clearing Software Standby Mode
for how to set the oscillation stabilization time when making a transition from watch mode to
high-speed mode.
(2) Exiting Watch Mode by RES or MRES Pins
For exiting watch mode by the RES or MRES pins, see (2), Exiting Software Standby Mode by
RES or MRES pins in section 24.6.2, Exiting Software Standby Mode.
(3) Exiting Watch Mode by STBY Pin
When the STBY pin level is driven low, a transition is made to hardware standby mode.
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