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HD6432633 Datasheet, PDF (1157/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)
27.3.4 Timing of On-Chip Supporting Modules
Table 27-7 lists the timing of on-chip supporting modules.
Table 27-7 Timing of On-Chip Supporting Modules
Condition:
PVCC = 4.5 V to 5.5 V, AVCC = 4.5 V to 5.5 V, Vref = 4.5 V to AVCC,
VSS = AVSS = PLLVSS = 0 V, ø = 2 to 28 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Item
Symbol Min
I/O port Output data delay time
t PWD
—
Input data setup time
t PRS
25
Input data hold time
t PRH
25
TPU
Timer output delay time
t TOCD
—
Timer input setup time
t TICS
25
Timer clock input setup time tTCKS
25
Timer clock Single edge
t TCKWH
1.5
pulse width Both edges
t TCKWL
2.5
WDT0 Overflow output delay time tWOVD
—
SCI
Input clock Asynchronous tScyc
4
cycle
Synchronous
6
Input clock pulse width
t SCKW
0.4
Input clock rise time
t SCKr
—
Input clock fall time
t SCKf
—
Transmit data delay time
t TXD
—
Receive data setup time
t RXS
40
(synchronous)
Receive data hold time
t RXH
40
(synchronous)
A/D
Trigger input setup time
t TRGS
40
converter
Max
40
—
—
40
—
—
—
—
40
—
—
0.6
1.5
1.5
40
—
Unit
ns
ns
ns
t cyc
ns
t cyc
t Scyc
t cyc
ns
Test Conditions
Figure 27-13
Figure 27-14
Figure 27-15
Figure 27-16
Figure 27-17
Figure 27-18
—
—
ns
Figure 27-19
1103