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HD6432633 Datasheet, PDF (1129/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)
26.3.5 Timing of On-Chip Supporting Modules
Table 26-9 lists the timing of on-chip supporting modules.
Table 26-9 Timing of On-Chip Supporting Modules
Condition:
PVCC = 4.5 V to 5.5 V, AVCC = 4.5 V to 5.5 V, Vref = 4.5 V to AVCC,
VSS = AVSS = PLLVSS = 0 V, ø = 32.768 kHz*, 2 to 28 MHz,
Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range
specifications)
Item
Symbol Min
I/O port Output data delay time
t PWD
—
Input data setup time
t PRS
25
Input data hold time
t PRH
25
PPG Pulse output delay time
t POD
—
TPU
Timer output delay time
t TOCD
—
Timer input setup time
t TICS
25
Timer clock input setup time tTCKS
25
Timer clock Single edge
t TCKWH
1.5
pulse width Both edges
t TCKWL
2.5
TMR Timer output delay time
t TMOD
—
Timer reset input setup time tTMRS
25
Timer clock input setup time tTMCS
25
Timer clock Single edge
t TMCWH
1.5
pulse width Both edges
t TMCWL
2.5
WDT0 Overflow output delay time tWOVD
—
WDT1 Buzz output delay time
t BUZD
—
PWM Pulse output delay time
t PWOD
—
SCI
Input clock Asynchronous tScyc
4
cycle
Synchronous
6
Input clock pulse width
t SCKW
0.4
Input clock rise time
t SCKr
—
Input clock fall time
t SCKf
—
Max
40
—
—
40
40
—
—
—
—
40
—
—
—
—
40
40
40
—
—
0.6
1.5
1.5
Unit
ns
ns
ns
ns
t cyc
ns
ns
ns
t cyc
ns
ns
ns
t cyc
t Scyc
t cyc
Test Conditions
Figure 26-20
Figure 26-21
Figure 26-22
Figure 26-23
Figure 26-24
Figure 26-26
Figure 26-25
Figure 26-27
Figure 26-28
Figure 26-29
Figure 26-30
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