HD6432633 Datasheet, PDF (201/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

5.4.5 Interrupt Response Times
The H8S/2633 Series is capable of fast word transfer instruction to on-chip memory, and the
program area is provided in on-chip ROM and the stack area in on-chip RAM, enabling high-
speed processing.
Table 5-9 shows interrupt response times - the interval between generation of an interrupt request
and execution of the first instruction in the interrupt handling routine. The execution status
symbols used in table 5-9 are explained in table 5-10.
Table 5-9 Interrupt Response Times
Normal Mode*⁵
Advanced Mode
No. Execution Status
INTM1 = 0 INTM1 = 1 INTM1 = 0 INTM1 = 1
1 Interrupt priority determination*¹
3
3
3
3
2 Number of wait states until executing 1 to
1 to
1 to
1 to
instruction ends*²
(19+2·S_I) (19+2·S_I)
(19+2·S_I) (19+2·S_I)
3 PC, CCR, EXR stack save
2·S_K
3·S_K
2·S_K
3·S_K
4 Vector fetch
S_I
S_I
2·S_I
2·S_I
5 Instruction fetch*³
2·S_I
2·S_I
2·S_I
2·S_I
6 Internal processing*⁴
2
2
2
2
Total (using on-chip memory)
11 to 31 12 to 32
12 to 32 13 to 33
Notes: *1 Two states in case of internal interrupt.
*2 Refers to MULXS and DIVXS instructions.
*3 Prefetch after interrupt acceptance and interrupt handling routine prefetch.
*4 Internal processing after interrupt acceptance and internal processing after vector fetch.
*5 Not available in the H8S/2633 Series.
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