HD6432633 Datasheet, PDF (710/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

14.1.2 Block Diagram
Figure 14-1 shows a block diagram of the PWM D/A module.
PWM0
PWM1
Internal clock
ø
ø/2
Clock selection
Clock
Basic cycle
compare-match A
Fine-adjustment
pulse addition A
Basic cycle
compare-match B
Fine-adjustment
pulse addition B
Control logic
Comparator
A
Comparator
B
Basic cycle overflow
DACNT
Internal data bus
Bus interface
DADRA
DADRB
DACR
Legend:
DACR: PWM D/A control register ( 6 bits)
DADRA: PWM D/A data register A (15 bits)
DADRB: PWM D/A data register B (15 bits)
DACNT: PWM D/A counter (14 bits)
Figure 14-1 PWM D/A Block Diagram
Module data bus
656