HD6432633 Datasheet, PDF (47/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

18.3.4 Master Receive Operation ................................................................................... 833
18.3.5 Slave Receive Operation ..................................................................................... 838
18.3.6 Slave Transmit Operation.................................................................................... 840
18.3.7 IRIC Setting Timing and SCL Control ............................................................... 842
18.3.8 Operation Using the DTC ................................................................................... 843
18.3.9 Noise Canceler..................................................................................................... 844
18.3.10 Sample Flowcharts .............................................................................................. 844
18.3.11 Initialization of Internal State.............................................................................. 847
18.4 Usage Notes ...................................................................................................................... 848
Section 19 A/D Converter ................................................................................................ 859
19.1 Overview........................................................................................................................... 859
19.1.1 Features ............................................................................................................... 859
19.1.2 Block Diagram..................................................................................................... 860
19.1.3 Pin Configuration ................................................................................................ 861
19.1.4 Register Configuration ........................................................................................ 862
19.2 Register Descriptions........................................................................................................ 863
19.2.1 A/D Data Registers A to D (ADDRA to ADDRD)............................................. 863
19.2.2 A/D Control/Status Register (ADCSR)............................................................... 864
19.2.3 A/D Control Register (ADCR)............................................................................ 867
19.2.4 Module Stop Control Register A (MSTPCRA)................................................... 868
19.3 Interface to Bus Master..................................................................................................... 869
19.4 Operation .......................................................................................................................... 870
19.4.1 Single Mode (SCAN = 0) .................................................................................... 870
19.4.2 Scan Mode (SCAN = 1) ...................................................................................... 872
19.4.3 Input Sampling and A/D Conversion Time......................................................... 874
19.4.4 External Trigger Input Timing ............................................................................ 875
19.5 Interrupts........................................................................................................................... 876
19.6 Usage Notes ...................................................................................................................... 876
Section 20 D/A Converter
(This function is not available in the H8S/2695) ................................. 883
20.1 Overview........................................................................................................................... 883
20.1.1 Features ............................................................................................................... 883
20.1.2 Block Diagram..................................................................................................... 883
20.1.3 Input and Output Pins.......................................................................................... 885
20.1.4 Register Configuration ........................................................................................ 885
20.2 Register Descriptions........................................................................................................ 886
20.2.1 D/A Data Registers 0 to 3 (DADR0 to DADR3) ................................................ 886
20.2.2 D/A Control Register 01 and 23 (DACR01 and DACR23) ................................ 886
20.2.3 Module Stop Control Register A and C (MSTPCRA and MSTPCRC).............. 888
20.3 Operation .......................................................................................................................... 890
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