HD6432633 Datasheet, PDF (265/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

7.5.8 Wait Control
There are two methods of inserting wait states in DRAM access: (1) insertion of program wait
states, and (2) insertion of pin waits via WAIT pin.
(1) Insertion of Program Wait States
Setting the ASTCR bit of an area set for DRAM to 1 automatically inserts from 0 to 3 wait states,
as set by WCRH and WCRL, between the T_c1 state and T_c2 state.
When a program wait is inserted, the write wait function is activated and only the CAS signal is
output only during the T_c2 state when writing.
Figure 7-17 shows example timing for the insertion of program waits.
Program
waits
T_p
T_r
T_c1
T_w
T_w
T_c2
ø
Address bus
AS
CSn (RAS)
CAS, LCAS
Read
RD
RCTS= 0
RCTS= 1
Data bus
Read data
CAS, LCAS
Write _{HWR (WE)}
Data bus
Write data
Note: ↓ shows timing for WAIT pin sampling.
n= 2 to 5
Figure 7-17 Example Program Wait Insertion Timing (Wait 2 State Insertion)
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