HD6432633 Datasheet, PDF (1338/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

TCNT0—Timer Counter 0
H'FF74 (W), H'FF75 (R)
TCNT1—Timer Counter 1
H'FFA2 (W), H'FFA3 (R)
(These functions are not available in the H8S/2695.)
Bit
:7
6
5
4
3
2
1
WDT0
WDT1
0
Initial value : ₀
0
0
0
0
0
0
0
R/W
: _R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Note: TCNT is write-protected by a password to prevent accidental overwriting.
For details see section 15.2.5, Notes on Register Access.
RSTCSR—Reset Control/Status Register
H'FF76 (W), H'FF77 (R) WDT0
Bit
:7
6
5
4
3
2
1
0
WOVF RSTE RSTS
—
—
—
—
—
Initial value : 0
0
0
1
1
1
1
1
R/W
: R/(W)* R/W R/W
—
—
—
—
—
Reset select
0 Power-on reset.
1 Manual reset.
Reset enable
0 No internal reset on TCNT overflow.*
1 Internal reset performed on TCNT overflow.
Note: * The LSI is not internally reset, but TCNT and TCSR
in WDT are reset.
Watchdog timer overflow flag
0 [Clearing condition]
Writing 0 to WOVF after reading RSTCSR when WOVF=1.
1 [Setting condition]
When, in watchdog timer mode, TCNT overflows (H’FF→ H’00).
Notes: * Only 0 can be written to these bits (to clear these flags).
RSTCSR is write-protected by a password to prevent accidental overwriting.
For details see section 15.2.5, Notes on Register Access.
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