HD6432633 Datasheet, PDF(107/1453 Page) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

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HD6432633 Datasheet, PDF (107/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

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(1) Normal Mode (Not Available in the H8S/2633 Series)

The exception vector table and stack have the same structure as in the H8/300 CPU.

Address Space: A maximum address space of 64 kbytes can be accessed.

Extended Registers (En): The extended registers (E0 to E7) can be used as 16-bit registers, or as

the upper 16-bit segments of 32-bit registers. When En is used as a 16-bit register it can contain

any value, even when the corresponding general register (Rn) is used as an address register. If the

general register is referenced in the register indirect addressing mode with pre-decrement (@âRn)

or post-increment (@Rn+) and a carry or borrow occurs, however, the value in the corresponding

extended register (En) will be affected.

Instruction Set: All instructions and addressing modes can be used. Only the lower 16 bits of

effective addresses (EA) are valid.

Exception Vector Table and Memory Indirect Branch Addresses: In normal mode the top area

starting at H'0000 is allocated to the exception vector table. One branch address is stored per 16

bits (figure 2-2). The exception vector table differs depending on the microcontroller. For details

of the exception vector table, see section 4, Exception Handling.

H'0000

H'0001

H'0002

H'0003

H'0004

H'0005

H'0006

H'0007

H'0008

H'0009

H'000A

H'000B

Power-on reset exception vector

Manual reset exception vector

(Reserved for system use)

Exception vector 1

Exception vector 2

Exception

vector table

Figure 2-2 Exception Vector Table (Normal Mode)

The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses

an 8-bit absolute address included in the instruction code to specify a memory operand that

contains a branch address. In normal mode the operand is a 16-bit word operand, providing a 16-

bit branch address. Branch addresses can be stored in the top area from H'0000 to H'00FF. Note

that this area is also used for the exception vector table.

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