HD6432633 Datasheet, PDF (744/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

15.5.6 OVF Flag Clearing in Interval Timer Mode
When the OVF Flag setting conflicts with the OVF flag reading in interval timer mode, writing 0
to the OVF bit may not clear the flag even though the OVF bit has been read while it is 1. If there
is a possibility that the OVF flag setting and reading will conflict, such as when the OVF flag is
polled with the interval timer interrupt disabled, read the OVF bit while it is 1 at least twice before
writing 0 to the OVF bit to clear the flag.
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