HD6432633 Datasheet, PDF (1075/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

25.3.1 Clock Timing
Table 25-5 lists the clock timing
Table 25-5 Clock Timing
Condition A: V_CC = PLLV_CC = 3.0 V to 3.6 V, PV_CC = 3.0 V to 5.5 V, AV_CC = 3.6 V to 5.5 V*¹,
V_ref = 3.6 V to AV_CC*², V_SS = AV_SS = PLLV_SS = 0 V, ø = 32.768 kHz, 2 to 16 MHz,
T_a = –20°C to +75°C (regular specifications), T_a = –40°C to +85°C (wide-range
specifications)
Condition B:
V_CC = PLLV_CC = 3.0 V to 3.6 V, PV_CC = 4.5 V to 5.5 V, AV_CC = 4.5 V to 5.5 V,
V_ref = 4.5 V to AV_CC, V_SS = AV_SS = PLLV_SS = 0 V, ø = 32.768 kHz, 2 to 25 MHz,
T_a = –20°C to +75°C (regular specifications), T_a = –40°C to +85°C (wide-range
specifications)
Condition A Condition B
16MHz
25MHz
Item
Symbol Min Max
Min Max Unit Test Conditions
Clock cycle time
t _cyc
Clock high pulse width t_CH
Clock low pulse width
t _CL
Clock rise time
t _Cr
Clock fall time
t _Cf
Clock oscillator settling t_OSC1
time at reset (crystal)
62.5 500
18 —
18 —
—
12
—
12
10 —
40 500 ns Figure 25-2
15
—
ns
15
—
ns
—
5
ns
—
5
ns
20
—
ms Figure 25-3
Clock oscillator settling t_OSC2
8
—
time in software standby
(crystal)
10
—
ms Figure 24-3
External clock output
t _DEXT
2
—
stabilization delay time
2
—
ms Figure 25-3
32 kHz clock oscillation t_OSC3
settling time
—
2
—
2
s
Sub clock oscillator
f _SUB
32.768
frequency
32.768
kHz
Sub clock (ø_SUB) cycle time t_SUB
30.5
30.5
µs
Notes: *1 AV_CC = 3.3 V to 5.5 V if A/D and D/A not used (pins used as I/O ports).
*2 Vref = 3.3 V to AV_CC if A/D and D/A not used (pins used as I/O ports).
1021