HD6432633 Datasheet, PDF (200/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

5.4.4 Interrupt Exception Handling Sequence
Figure 5-7 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.
Figure 5-7 Interrupt Exception Handling
146