HD6432633 Datasheet, PDF (385/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

9.1.3 Register Configuration
Table 9-1 summarizes the DTC registers.
Table 9-1 DTC Registers
Name
Abbreviation R/W Initial Value Address*¹
DTC mode register A
MRA
—*² Undefined
—*³
DTC mode register B
MRB
—*² Undefined
—*³
DTC source address register
SAR
—*² Undefined
—*³
DTC destination address register DAR
—*² Undefined
—*³
DTC transfer count register A
CRA
—*² Undefined
—*³
DTC transfer count register B
CRB
—*² Undefined
—*³
DTC enable registers
DTCER
R/W H'00
H'FE16 to H'FE1E
DTC vector register
DTVECR
R/W H'00
H'FE1F
Module stop control register
MSTPCRA R/W H'3F
H'FDE8
Notes: *1 Lower 16 bits of the address.
*2 Registers within the DTC cannot be read or written to directly.
*3 Register information is located in on-chip RAM addresses H'EBC0 to H'EFBF. It cannot
be located in external memory space. When the DTC is used, do not clear the RAME
bit in SYSCR to 0.
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