HD6432633 Datasheet, PDF (1063/1453 Pages) Renesas Technology Corp – Series of Microcomputers (MCUs: microcomputer units)

(1) Exiting Sub-Active Mode by SLEEP Instruction
When the SLEEP instruction is executed with the SBYCR SSBY bit = 1, LPWRCR DTON bit =
0, and TCSR (WDT1) PSS bit = 1, the CPU exits sub-active mode and a transition is made to
watch mode. When the SLEEP instruction is executed with the SBYCR SSBY bit = 0, LPWRCR
LSON bit = 1, and TCSR (WDT1) PSS bit = 1, a transition is made to sub-sleep mode. Finally,
when the SLEEP instruction is executed with the SBYCR SSBY bit = 1, LPWRCR DTON bit = 1,
LSON bit = 0, and TCSR (WDT1) PSS bit = 1, a direct transition is made to high-speed mode
(SCK0 to SCK2 all 0).
See section 24.11, Direct Transitions for details of direct transitions.
(2) Exiting Sub-Active Mode by RES or MRES Pins
For exiting sub-active mode by the RES or MRES pins, see (2), Exiting Software Standby Mode
by RES or MRES pins in section 24.6.2, Exiting Software Standby Mode.
(3) Exiting Sub-Active Mode by STBY Pin
When the STBY pin level is driven Low, a transition is made to hardware standby mode.
24.10.3 Usage Notes
(1) DMAC/DTC activation and sub-active mode/watch mode transition
When a transition is made to sub-active mode or watch mode, make a module stop setting for the
DMAC/DTC (write 1 to the corresponding bit in MSTPCR), then read 1 from that bit for
confirmation, before making the mode transition.
When exiting the module stop state (by writing 0 to the corresponding bit in MSTPCR), first make
a transition from sub-active mode to active mode.
If a DMAC/DTC activation source occurs in sub-active mode, the DMAC/DTC is activated when
the module stop state is exited after a transition is made to active mode.
(2) Interrupt sources and sub-active mode/watch mode transition
For on-chip peripheral modules that stop operating in sub-active mode (DMAC, DTC, TPU, FRT,
TMRX, TMRY, timer connection, IIC), a corresponding interrupt cannot be cleared in sub-active
mode. Therefore, CPU interrupt source clearance cannot be effected if a transition is made to sub-
active mode when an interrupt has been requested.
Interrupts for these modules should be disabled before executing a SLEEP instruction and making
a transition to sub-active mode or watch mode.
1009