MC68030 Datasheet, PDF (92/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Instruction Set Summary
3.3 INTEGER CONDITION CODES
The CCR portion of the SR contains five bits which indicate the results of many integer
instructions. Program and system control instructions use certain combinations of these bits
to control program and system flow.
The first four bits represent a condition resulting from a processor operation. The X bit is an
operand for multiprecision computations; when it is used, it is set to the value of the C bit.
The carry bit and the multiprecision extend bit are separate in the M68000 Family to simplify
programming techniques that use them (refer to Table 3–8 as an example).
The condition codes were developed to meet two criteria:
• Consistency across instructions, uses, and instances
• Meaningful Results no change unless it provides useful information
Consistency across instructions means that all instructions that are special cases of more
general instructions affect the condition codes in the same way. Consistency across
instances means that all instances of an instruction affect the condition codes in the same
way. Consistency across uses means that conditional instructions test the condition codes
similarly and provide the same results, regardless of whether the condition codes are set by
a compare, test, or move instruction.
In the instruction set definitions, the CCR is shown as follows:
X
N
Z
V
C
where:
X (extend)
Set to the value of the C bit for arithmetic operations. Otherwise not affected or set to
a specified result.
N (negative)
Set if the most significant bit of the result is set. Cleared otherwise.
Z (zero)
Set if the result equals zero. Cleared otherwise.
V (overflow)
Set if arithmetic overflow occurs. This implies that the result cannot be represented in
the operand size. Cleared otherwise.
C (carry)
Set if a carry out of the most significant bit of the operand occurs for an addition. Also
set if a borrow occurs in a subtraction. Cleared otherwise.
3-14
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