MC68030 Datasheet, PDF (294/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Memory Management Unit
9.1 TRANSLATION TABLE STRUCTURE
The M68030 uses the ATC and translation tables stored in memory to perform the
translation from a logical to a physical address. Translation tables for a program are loaded
into memory by the operating system.
The general translation table structure supported by the MC68030 is a tree structure of
tables. The pointer tables form the branches of the tree. These tables contain the base
addresses of other tables. Page descriptors can reside in pointer tables and, in that case,
are called early termination descriptors. The tables at the leaves of the tree are called page
tables. Only a portion of the translation table for the entire logical address space is required
to be resident in memory at any time: specifically, only the portion of the table that translates
the logical addresses that the currently executing process(es) use(s) must be resident.
Portions of translation tables can be dynamically allocated as the process requires
additional memory.
As shown in Figure 9-4, the root pointer for a table is a descriptor that contains the base
address of the top level table for the tree. The pointer tables and page tables also consist of
descriptors. A descriptor in a pointer table typically contains the base address of a table at
the next level of the tree. A table descriptor can also contain limits for the index into the next
table, protection information, and history information pertaining to the descriptor. Each table
is indexed by a field extracted from the logical address. In the example shown in Figure 9-
4, the A field of the logical address, $00A, is added to the root pointer value to select a
descriptor at the A level of the translation tree. The selected descriptor points to the base of
the appropriate page table, and the B field of the logical address ($006) is added to this base
address to select a descriptor within the page table. A descriptor in a page table contains
the physical base address of the page, protection information, and history information for the
page. A page descriptor can also reside in a pointer table or even in a root pointer to define
a contiguous block of pages. A two-level page task is shown. The 32-bit logical address
space is divided into 4096 segments of 1024 bytes each.
Figure 9-5 shows a possible layout of this example translation tree in memory.
9-6
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