MC68030 Datasheet, PDF (85/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Instruction Set Summary
Instruction
AND
ANDI
EOR
EORI
NOT
OR
ORI
TST
Table 3-3. Logical Operations
Operand Syntax
〈ea〉,Dn
Dn,〈ea〉
#〈data〉,〈ea〉
Dn,〈data〉,〈ea〉
#〈data〉,〈ea〉
〈ea〉
〈ea〉,Dn
Dn,〈ea〉
#〈data〉,〈ea〉
#〈ea〉
Operand Size
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
Operation
source Λ destination → destination
immediate data Λ destination → destination
source ⊕ destination → destination
immediate data x destination → destination
∼ destination → destination
source V destination → destination
immediate data V destination → destination
source — 0 to set condition codes
3.2.4 Shift and Rotate Instructions
The arithmetic shift instructions (ASR and ASL) and logical shift instructions (LSR and LSL)
provide shift operations in both directions. The ROR, ROL, ROXR, and ROXL instructions
perform rotate (circular shift) operations, with and without the extend bit. All shift and rotate
operations can be performed on either registers or memory.
Register shift and rotate operations shift all operand sizes. The shift count may be specified
in the instruction operation word (to shift from 1–8 places) or in a register (modulo 64 shift
count).
Memory shift and rotate operations shift word-length operands one bit position only. The
SWAP instruction exchanges the 16-bit halves of a register. Performance of shift/rotate
instructions is enhanced so that use of the ROR and ROL instructions with a shift count of
eight allows fast byte swapping. Table 3–4 is a summary of the shift and rotate operations.
MOTOROLA
MC68030 USER’S MANUAL
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