MC68030 Datasheet, PDF (494/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Instruction Execution Timing
11.7.1 MMU Effective Address Calculation (Continued)
Address Mode
Head
Tail
I-Cache Case No-Cache Case
FULL FORMAT EXTENSION WORD(S)
([d₃₂,B])
([d₃₂,B],I)
([d₃₂,B],d₁₆)
([d₃₂,B],I,d₁₆)
([d₃₂,B],d₃₂)
([d₃₂,B],I,d₃₂)
6
0
20(1/0/0)
6
0
20(1/0/0)
6
0
20(1/0/0)
6
0
20(1/0/0)
6
0
22(1/0/0)
6
0
22(1/0/0)
B = Base address; O, An, Xn, An+Xn. Form does not affect timing.
I = Index; O, Xn
*No separation on effective address and operation in timing. Head and tail are the operation's.
NOTE: Xn cannot be in B and I at the same time. Scaling and size of Xn do not affect timing.
20(1/2/0)
20(1/2/0)
20(1/3/0)
20(1/3/0)
22(1/3/0)
22(1/3/0)
MOTOROLA
MC68030 USER’S MANUAL
11-59