MC68030 Datasheet, PDF (478/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Instruction Execution Timing
11.6.10 Binary-Coded Decimal and Extended Instructions
The binary-coded decimal and extended instruction table indicates the number of clock
periods needed for the processor to perform the specified operation using the given
addressing modes. No additional tables are needed to calculate total effective execution
time for these instructions. For instruction-cache case and for no-cache case, the total
number of clock cycles is outside the parentheses. The number of read, prefetch, and write
cycles is given inside the parentheses as (r/p/w). The read, prefetch, and write cycles are
included in the total clock cycle number.
All timing data assumes two-clock reads and writes.
ABCD
ABCD
SBCD
SBCD
ADDX
ADDX
SUBX
SUBX
CMPM
PACK
PACK
UNPK
UNPK
Instruction
Dn,Dn
–(An),–(An)
Dn,Dn
–(An),–(An)
Dn,Dn
–(An),–(An)
Dn,Dn
–(An)
(An)+,(An)+
Dn,Dn,#〈data〉
–(An),–(An),#〈data〉
Dn,Dn,#〈data〉
–(An),–(An),#〈data〉
Head
0
2
0
2
2
2
2
2
0
6
2
8
2
Tail
I-Cache Case No-Cache Case
0
4(0/0/0)
4(0/1/0)
1
13(2/0/1)
14(2/1/1)
0
4(0/0/0)
4(0/1/0)
1
13(2/0/1)
14(2/1/1)
0
2(0/0/0)
2(0/1/0)
1
9(2/0/1)
10(2/1/1)
0
2(0/0/0)
2(0/1/0)
1
9(2/0/1)
10(2/1/1)
0
8(2/0/0)
8(2/1/0)
0
6(0/0/0)
6(0/1/0)
1
11(1/0/1)
11(1/1/1)
0
8(0/0/0)
8(0/1/0)
1
11(1/0/1)
11(1/1/1)
MOTOROLA
MC68030 USER’S MANUAL
11-43