MC68030 Datasheet, PDF (454/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Instruction Execution Timing
2a. For operation timings that include a data read (e.g., BFFF0 and TAS), add the num-
ber of wait states to the CC time only. Neither the head nor the tail are affected.
NOTE
The CC timing and tail of the MOVEM instruction are special
cases for both data reads and writes. Equations for both the CC
timing and the tail as a function of wait states are footnoted in the
table in 11.6.7 Special-Purpose Move Instruction.
2b. If the operation has more than one data read, add the total amount of wait states for
all reads to the CC time. Neither the head nor the tail are affected. Refer to preceding
note.
3a. For operation timings that include a data write, the number of wait states is added
to the tail and the CC time. The head is not affected. Refer to preceding note.
3b. If there is more than one write in the operation, the tail is only increased by the wait
states for one write. The CC timing is increased by the total amount of wait states for
all writes. Refer to preceding note.
The following example calculates the instruction-cache-case execution time for the specified
instruction stream with two wait states (four-clock reads and writes). The lines that are
corrected for wait states are printed in boldface type and are used to calculate the instruction
execution time. References are to the preceding rules.
Instruction
1. MOVE.L
2. ADD.L
3. BFCLR
4. BFTST
5. MOVEM
($800,A2,D3),(A5,D2)
D1,([$30,A4])
($20,A5){1:5} - (<5 bytes)
($10,A3,D3){31:31} - (5 bytes)
([A1,D1]),A1-A4 - 4 registers
MOTOROLA
MC68030 USER’S MANUAL
11-19