MC68030 Datasheet, PDF (417/602 Pages) Motorola, Inc – ENHANCED 32-BIT MICROPROCESSOR

Coprocessor Interface Description
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Figure 10-41. MC68030 Pre-Instruction Stack Frame
The value of the program counter saved in this stack frame is the F-line operation word
address of the coprocessor instruction during which the primitive was received. Thus, if the
exception handler routine does not modify the stack frame, an RTE instruction causes the
MC68030 to return and reinitiate execution of the coprocessor instruction.
The take pre-instruction exception primitive can be used when the coprocessor does not
recognize a value written to either its command CIR or condition CIR to initiate a
coprocessor instruction. This primitive can also be used if an exception occurs in the
coprocessor instruction before any program-visible resources are modified by the instruction
operation. This primitive should not be used during a coprocessor instruction if program-
visible resources have been modified by that instruction. Otherwise, since the MC68030
reinitiates the instruction when it returns from exception processing, the restarted instruction
receives the previously modified resources in an inconsistent state.
One of the most important uses of the take pre-instruction exception primitive is to signal an
exception condition in a cpGEN instruction that was executing concurrently with the main
processor's instruction execution. If the coprocessor no longer requires the services of the
main processor to complete a cpGEN instruction and the concurrent instruction completion
is transparent to the programmer's model, the coprocessor can release the main processor
by issuing a primitive with CA=0. The main processor usually executes the next instruction
in the instruction stream, and the coprocessor completes its operations concurrently with the
main processor operation. If an exception occurs while the coprocessor is executing an
instruction concurrently, the exception is not processed until the main processor attempts to
initiate the next general or conditional instruction. After the main processor writes to the
command or condition CIR to initiate a general or conditional instruction, it then reads the
response CIR. At this time, the coprocessor can return the take pre-instruction exception
primitive. This protocol allows the main processor to proceed with exception processing
related to the previous concurrently executing coprocessor instruction and then return and
reinitiate the coprocessor instruction during which the exception was signaled. The
coprocessor should record the addresses of all general category instructions that can be
executed concurrently with the main processor and that support exception recovery. Since
the exception is not reported until the next coprocessor instruction is initiated, the processor
usually requires the instruction address to determine which instruction the coprocessor was
executing when the exception occurred. A coprocessor can record the instruction address
by setting PC=1 in one of the primitives it uses before releasing the main processor.
10.4.19 Take Mid-Instruction Exception Primitive
The take mid-instruction exception primitive initiates exception processing using a
coprocessor-supplied exception vector number and the mid-instruction exception stack
frame format. This primitive applies to general and conditional category instructions. Figure
10-42 shows the format of the take mid-instruction exception primitive.
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MC68030 USER’S MANUAL
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